A conventional method of fabricating thin film transistors is shown in FIG. 6 and FIG. 7. In these figures, numeral 61 is an insulating substrate of quartz or glass, numeral 62 is a gate electrode, numeral 63 is a gate insulation layer consisting of nitride, numeral 64 is an amorphous silicon thin layer, numeral 65 is a protecting insulation layer of silicon nitride, numeral 66 is a thin layer of n type amorphous silicon. Numeral 71 is an ion including phosphorous and hydrogen, numeral 72 is an n-type doped layer, and numeral 73 is a damaged layer. Three conventional methods for the fabrication of thin film transistors are known: (1) deposition of an n-type amorphous silicon thin layer 66 on top of the amorphous silicon thin layer 64, by plasma CVD, as shown in FIG. 6, (2) forming an n-type doped layer 72, to discharge-decompose a gas including dopant, e.g., phosphine in hydrogen, and to accelerate, irradiate, and implant the produced ion 71 (A. Yoshida et al; U.S. Pat. No. 4,859,908) as shown in FIG. 7, and (3) forming an n-type doping layer by ion implantation with mass separation (H. F. Bare and G. W. Neudeck; IEEE Electron Device Letters EDL-7 (1986), 431.
Method (1) relating to the deposition of an n-type amorphous silicon thin layer by plasma CVD, however, had the disadvantage of necessitating a process to remove n-type amorphous silicon thin layer 66 on the protecting insulation layer 65, and the etching of the n-type amorphous silicon thin layer 66, thus resulting in yield decrease or reliability fall.
Referring to method (3), wherein an n-type doped layer is formed by ion implantation with mass separation, the process to remove an n-type amorphous silicon thin layer on the protecting insulation layer is not necessary, and the doping layer does not etch. This is because the n-type doping layer is formed in the amorphous silicon thin layer. However, because of the irradiation of the ion beam with mass separation, for the formation of a functional element for a large area such as the liquid crystal display, scanning of the sample and the ion beam is necessary, and the productivity is low.
By contrast, in method (2) above, in which ions are produced by the discharge-decomposition of a gas including dopant, and in which the ions are accelerated and irradiated and implanted to form the source and drain region, the processing of a large area article can be achieved with low cost and high productivity. However, since the produced ions are all implanted without mass separation into the substrate, light ions, especially of hydrogen which have long projected range (mean depth of implanted ions), reach the vicinity of the boundary of gate insulation layer 63 and amorphous silicon thin layer 64, and, as shown in FIG. 7(b), a damaged layer 73 is formed resulting in deterioration of characteristics, mobility and reliability of the thin film transistor. FIG. 8 shows the density distribution of hydrogen and phosphorous in the doped layer along the depth formed by the method (2) of fabricating a thin film transistor.